Fusing the masterboard

Electronics
1

Hello everyone,

I seek help to fuse the masterboard. I am following the instructions of using an ESP32 dev board (I’m using a WeMos D1 mini I had lying around) with the ESP32 module removed, the right pins soldered to POWER and PROG.

I am able to communicate (sort of) with the board using serial, through picocom, I get the following output when I press the reset button: `

Terminal ready
ets Jun 8 2016 00:22:57

rst:0x1 (POWERON_RESET),boot:0x13 (SPI_FAST_FLASH_BOOT)
configsip: 0, SPIWP:0xee
clk_drv:0x00,q_drv:0x00,d_drv:0x00,cs0_drv:0x00,hd_drv:0x00,wp_drv:0x00
mode:DIO, clock div:2
load:0x3fff0018,len:4
load:0x3fff001c,len:5656
load:0x40078000,len:0
ho 12 tail 0 room 4
load:0x40078000,len:13844
entry 0x40078fc4
I (30) boot: ESP-IDF v3.0.7 2nd stage bootloader
I (31) boot: compile time 09:04:31
I (31) boot: Enabling RNG early entropy source…
I (35) boot: SPI Speed : 40MHz
I (39) boot: SPI Mode : DIO
I (43) boot: SPI Flash Size : 4MB
I (47) boot: Partition Table:
I (51) boot: ## Label Usage Type ST Offset Length
I (58) boot: 0 phy_init RF data 01 01 0000f000 00001000
I (66) boot: 1 otadata OTA data 01 00 00010000 00002000
I (73) boot: 2 nvs WiFi data 01 02 00012000 0000e000
I (81) boot: 3 at_customize unknown 40 00 00020000 000e0000
I (88) boot: 4 ota_0 OTA app 00 10 00100000 00180000
I (95) boot: 5 ota_1 OTA app 00 11 00280000 00180000
I (103) boot: End of partition table
I (107) boot: No factory image, trying OTA 0
I (112) esp_image: segment 0: paddr=0x00100020 vaddr=0x3f400020 size=0x20614 (132628) map
I (168) esp_image: segment 1: paddr=0x0012063c vaddr=0x3ffc0000 size=0x02d7c ( 11644) load
I (172) esp_image: segment 2: paddr=0x001233c0 vaddr=0x40080000 size=0x00400 ( 1024) load
I (175) esp_image: segment 3: paddr=0x001237c8 vaddr=0x40080400 size=0x0c848 ( 51272) load
I (205) esp_image: segment 4: paddr=0x00130018 vaddr=0x400d0018 size=0xdfc80 (916608) map
I (526) esp_image: segment 5: paddr=0x0020fca0 vaddr=0x4008cc48 size=0x02504 ( 9476) load
I (530) esp_image: segment 6: paddr=0x002121ac vaddr=0x400c0000 size=0x00064 ( 100) load
I (541) boot: Loaded app from partition at offset 0x100000
I (542) boot: Disabling RNG early entropy source…
1.1.3
I (656) wifi: wifi firmware version: 703e53b
I (656) wifi: config NVS flash: enabled
I (656) wifi: config nano formating: disabled
I (667) wifi: Init dynamic tx buffer num: 32
I (667) wifi: Init data frame dynamic rx buffer num: 32
I (667) wifi: Init management frame dynamic rx buffer num: 32
I (672) wifi: wifi driver task: 3ffdeeb8, prio:23, stack:3584
I (677) wifi: Init static rx buffer num: 10
I (681) wifi: Init dynamic rx buffer num: 32
I (685) wifi: wifi power manager task: 0x3ffe369c prio: 21 stack: 2560
I (719) wifi: mode : softAP (ac:67:b2:5e:6b:9d)
I (726) wifi: mode : sta (ac:67:b2:5e:6b:9c) + softAP (ac:67:b2:5e:6b:9d)
I (730) wifi: mode : softAP (ac:67:b2:5e:6b:9d)
I (734) wifi: set country: cc=CN schan=1 nchan=13 policy=1

`

. However, espefuse.py , and all other tools of esptool fail to connect…

`
espefuse.py v2.8
Connecting…………………_____

A fatal error occurred: Failed to connect to ESP32: Timed out waiting for packet header
`

I am stuck now and unable to proceed, any advice is appreciated.

Thanks,

20210121_104303
20210121_1043031960×4032 1.45 MB

Thijs Van Hauwermeiren

2

Hello,

Did you manage to solve your issue? I think this comes from the ESP installation.
Unfortunately I think your best option is to try to ask for help on ESP32 forums directly, or try on another computer.
You could also try with an esp32 dev board directly (if you have one) to validate that it is a software issue and not a hardware one

Please keep us posted.

Best,
Thomas

3

Hey!

Managed to resolve the issue today. It was likely a hardware related.
I’m using a ESP32 based D1 mini board from Wemos (wemos.cc) as usb connector to interface with the master board. The problem was I had to remove not only the ESP32 chip, but also the memory module, which is a seperate component atleast on my board.

When I did this, I managed to get the master board into boot mode while pressing the reset button, compile the sdk and run the examples.

Best regards,

Thijs Van Hauwermeiren

4

Good to know!

Best,
Thomas.